1. Field of the Invention
This invention relates to polishing tools and to methods and devices for controlling the orientation of a wafer during polishing.
2. Description of Related Art
Chemical mechanical polishing (CMP) in semiconductor processing polishes the surface of a wafer by removing the highest points from the surface. CMP systems can polish unprocessed and partially processed wafers. A typical unprocessed wafer is crystalline silicon or another semiconductor material that is formed into a nearly circular wafer. A typical partially processed wafer when ready for polishing has a top layer of a dielectric material such as glass, silicon dioxide, or silicon nitride or of a conductive material such as copper or tungsten overlying one or more patterned layers that create local topological features of heights on the order of about 5000 .ANG. to 10,000 .ANG.. Polishing smoothes the local features of the surface. Ideally, the surface after polishing is flat over areas the size of a die to be formed from the wafer. Currently, polishing is sought that locally planarizes wafers to a tolerance of about 3000 .ANG. over the area of a 10.times.10-mm die.
FIG. 1 illustrates a known chemical mechanical polishing system 100 that includes a wafer carrier head 110 on which a wafer 120 is mounted, a belt 130 carrying polishing pads, and a support 140 that supports belt 130 under wafer 120. During polishing, the polishing pads are sprayed or coated with a slurry, and a drive system 150 rotates belt 130 so that the polishing pads slide against the surface of wafer 120. Chemical action of the slurry and the mechanical action of particles in the slurry and the polishing pads against the surface of wafer 120 remove material from the surface. For uniform removal of the highest points on wafer 120, wafer 120 should be kept parallel to the polishing pads during polishing. However, motion of belt 130 causes friction between wafer 120 and the polishing pads that creates a torque that tends to tilt wafer 120 relative to the polishing pads. Tilting wafer 120 can result in uneven polishing where more material is removed from one edge of wafer 120.
U.S. Pat. Nos. 5,593,344 and 5,558,568 describe systems such as shown in FIG. 1 and further describe a fluid bearing in carrier head 110 for adjustment of the attack angle of wafer 120 at belt 130. The fluid bearing allows the head to adjust so that a wafer is parallel to polishing pads. To avoid tilting, the axis of rotation of the fluid bearing in carrier head 110 is in or nearly in the plane of the pads so that torques created by frictional forces about the bearing's axis of rotation is nearly zero. The constraint that the attack-angle-adjustment axis of rotation be in the plane of the pads significantly restricts carrier head design.
Another concern for carrier heads is the profile of the pressure applied to a wafer (or polishing pad) during polishing. To polish a surface to the tolerances required for semiconductor processing, CMP systems attempt to apply a polishing pad to a wafer with uniform pressure. Accordingly, it is desired that carrier head 110 and support 140 apply uniform pressure across wafer 120 and across the area of belt 130 under wafer 120. A wafer carrier head is sought that applies a uniform pressure to a wafer, aligns the surface of the wafer with the surface of the polishing pads, and avoids tilting the wafer when polishing applies a frictional force to the wafer.